Welcome to Verisocks SCP
You are reading the documentation for Verisocks SCP (version 1.7), a simulation control protocol (SCP) based on a TCP socket server/client interface over VPI, intended to be used as a simulation control interface with verilog simulators, commercial or not, such as Icarus.
From version 1.3.0, an integration API for Verisocks SCP to be used together with C++ code generated by Verilator is also provided. The Verisocks SCP protocol is compatible whether interfacing with a Verilog simulator with VPI or with a verilated design, minor a few exceptions.
https://github.com/jchabloz/verisocks
Features
Easy to integrate within any existing verilog testbench and simulators implementing VPI (only one system task to be called within the top-level
initialstatement)As an alternative, Verisocks SCP also supports a simple-to-use API to use with Verilated C++ code
Verisocks SCP interfaces with the simulator simply via a standard TCP socket with a JSON-based protocol
Using this interface, Verisocks allows to control the simulation and probe its status by:
instructing the simulator to run the simulation for a given amount of time,
instructing the simulator to run until a given simulation time,
instructing to run the simulator until a certain event happens,
reading or writing simulator variables,
getting the current simulation time,
etc…