Welcome to Verisocks

Version: 1.3

Release: 1.3.0

You are reading the documentation for Verisocks (version 1.3), a generic TCP socket server/client interface over VPI, intended to be used as a simulation control interface with verilog simulators, commercial or not, such as Icarus.

From version 1.3.0, an integration API for Verisocks to be used together with C++ code generated by Verilator is also provided.

https://github.com/jchabloz/verisocks

Features

• Easy to integrate within any existing verilog testbench and simulators implementing VPI (only one system task to be called within the top-level initial statement)

• As an alternative, Verisocks also supports a simple-to-use API to use with Verilated C++ code

• Verisocks interfaces with the simulator simply via a standard TCP socket with a JSON-based protocol

• Using this interface, Verisocks allows to control the simulation and probe its status by:

  • instructing the simulator to run the simulation for a given amount of time,

  • instructing the simulator to run until a given simulation time,

  • instructing to run the simulator until a certain event happens,

  • reading or writing simulator variables,

  • getting the current simulation time,

  • etc…

Contents

• Introduction
  • Quick start
  • Motivation
  • Alternative simulators
• Architecture
  • Overview
  • TCP socket
  • Shared execution focus
  • The $verisocks_init() PLI system task
• TCP protocol
  • Frames format
  • Commands
• Verilator integration
  • Verisocks C++ API
  • Configuration file and wizard script
• Python client
  • Python client API documentation
  • Miscellaneous utilitaries
• Examples

• Release notes

Indices and tables

• Index

• Module Index

• Search Page